diff --git a/src/libsodium/sodium/runtime.c b/src/libsodium/sodium/runtime.c index 30cfc726..00d0a868 100644 --- a/src/libsodium/sodium/runtime.c +++ b/src/libsodium/sodium/runtime.c @@ -1,4 +1,3 @@ - #include #include #ifdef HAVE_ANDROID_GETCPUFEATURES @@ -39,8 +38,8 @@ static CPUFeatures _cpu_features; #define CPUID_EDX_SSE2 0x04000000 -#define XCR0_SSE 0x00000002 -#define XCR0_AVX 0x00000004 +#define XCR0_SSE 0x00000002 +#define XCR0_AVX 0x00000004 static int _sodium_runtime_arm_cpu_features(CPUFeatures * const cpu_features) @@ -55,7 +54,8 @@ _sodium_runtime_arm_cpu_features(CPUFeatures * const cpu_features) # else cpu_features->has_neon = 0; # endif -# elif defined(HAVE_ANDROID_GETCPUFEATURES) && defined(ANDROID_CPU_ARM_FEATURE_NEON) +# elif defined(HAVE_ANDROID_GETCPUFEATURES) && \ + defined(ANDROID_CPU_ARM_FEATURE_NEON) cpu_features->has_neon = (android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_NEON) != 0x0; # else @@ -74,32 +74,33 @@ _cpuid(unsigned int cpu_info[4U], const unsigned int cpu_info_type) #elif defined(HAVE_CPUID) cpu_info[0] = cpu_info[1] = cpu_info[2] = cpu_info[3] = 0; # ifdef __i386__ - __asm__ __volatile__ ("pushfl; pushfl; " - "popl %0; " - "movl %0, %1; xorl %2, %0; " - "pushl %0; " - "popfl; pushfl; popl %0; popfl" : - "=&r" (cpu_info[0]), "=&r" (cpu_info[1]) : - "i" (0x200000)); + __asm__ __volatile__( + "pushfl; pushfl; " + "popl %0; " + "movl %0, %1; xorl %2, %0; " + "pushl %0; " + "popfl; pushfl; popl %0; popfl" + : "=&r"(cpu_info[0]), "=&r"(cpu_info[1]) + : "i"(0x200000)); if (((cpu_info[0] ^ cpu_info[1]) & 0x200000) == 0x0) { return; /* LCOV_EXCL_LINE */ } # endif # ifdef __i386__ - __asm__ __volatile__ ("xchgl %%ebx, %k1; cpuid; xchgl %%ebx, %k1" : - "=a" (cpu_info[0]), "=&r" (cpu_info[1]), - "=c" (cpu_info[2]), "=d" (cpu_info[3]) : - "0" (cpu_info_type), "2" (0U)); + __asm__ __volatile__("xchgl %%ebx, %k1; cpuid; xchgl %%ebx, %k1" + : "=a"(cpu_info[0]), "=&r"(cpu_info[1]), + "=c"(cpu_info[2]), "=d"(cpu_info[3]) + : "0"(cpu_info_type), "2"(0U)); # elif defined(__x86_64__) - __asm__ __volatile__ ("xchgq %%rbx, %q1; cpuid; xchgq %%rbx, %q1" : - "=a" (cpu_info[0]), "=&r" (cpu_info[1]), - "=c" (cpu_info[2]), "=d" (cpu_info[3]) : - "0" (cpu_info_type), "2" (0U)); + __asm__ __volatile__("xchgq %%rbx, %q1; cpuid; xchgq %%rbx, %q1" + : "=a"(cpu_info[0]), "=&r"(cpu_info[1]), + "=c"(cpu_info[2]), "=d"(cpu_info[3]) + : "0"(cpu_info_type), "2"(0U)); # else - __asm__ __volatile__ ("cpuid" : - "=a" (cpu_info[0]), "=b" (cpu_info[1]), - "=c" (cpu_info[2]), "=d" (cpu_info[3]) : - "0" (cpu_info_type), "2" (0U)); + __asm__ __volatile__("cpuid" + : "=a"(cpu_info[0]), "=b"(cpu_info[1]), + "=c"(cpu_info[2]), "=d"(cpu_info[3]) + : "0"(cpu_info_type), "2"(0U)); # endif #else (void) cpu_info_type; @@ -119,38 +120,43 @@ _sodium_runtime_intel_cpu_features(CPUFeatures * const cpu_features) } _cpuid(cpu_info, 0x00000001); #if defined(HAVE_EMMINTRIN_H) || \ - (defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) + (defined(_MSC_VER) && \ + (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) cpu_features->has_sse2 = ((cpu_info[3] & CPUID_EDX_SSE2) != 0x0); #else - cpu_features->has_sse2 = 0; + cpu_features->has_sse2 = 0; #endif #if defined(HAVE_PMMINTRIN_H) || \ - (defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) + (defined(_MSC_VER) && \ + (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) cpu_features->has_sse3 = ((cpu_info[2] & CPUID_ECX_SSE3) != 0x0); #else - cpu_features->has_sse3 = 0; + cpu_features->has_sse3 = 0; #endif #if defined(HAVE_TMMINTRIN_H) || \ - (defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) + (defined(_MSC_VER) && \ + (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) cpu_features->has_ssse3 = ((cpu_info[2] & CPUID_ECX_SSSE3) != 0x0); #else - cpu_features->has_ssse3 = 0; + cpu_features->has_ssse3 = 0; #endif #if defined(HAVE_SMMINTRIN_H) || \ - (defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) + (defined(_MSC_VER) && \ + (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) cpu_features->has_sse41 = ((cpu_info[2] & CPUID_ECX_SSE41) != 0x0); #else - cpu_features->has_sse41 = 0; + cpu_features->has_sse41 = 0; #endif cpu_features->has_avx = 0; #if defined(HAVE_AVXINTRIN_H) || \ - (defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) - if ((cpu_info[2] & (CPUID_ECX_AVX | CPUID_ECX_XSAVE | CPUID_ECX_OSXSAVE)) - == (CPUID_ECX_AVX | CPUID_ECX_XSAVE | CPUID_ECX_OSXSAVE)) { + (defined(_MSC_VER) && \ + (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) + if ((cpu_info[2] & (CPUID_ECX_AVX | CPUID_ECX_XSAVE | CPUID_ECX_OSXSAVE)) == + (CPUID_ECX_AVX | CPUID_ECX_XSAVE | CPUID_ECX_OSXSAVE)) { uint32_t xcr0 = 0U; # ifdef MSC_VER __asm { @@ -159,10 +165,13 @@ _sodium_runtime_intel_cpu_features(CPUFeatures * const cpu_features) mov xcr0, eax } # elif defined(HAVE_AVX_ASM) - __asm__ __volatile__ (".byte 0x0f, 0x01, 0xd0" /* XGETBV */ - : "=a"(xcr0) : "c"((uint32_t) 0U) : "%edx"); + __asm__ __volatile__(".byte 0x0f, 0x01, 0xd0" /* XGETBV */ + : "=a"(xcr0) + : "c"((uint32_t) 0U) + : "%edx"); # endif - if ((xcr0 & (XCR0_SSE | XCR0_AVX)) == (XCR0_SSE | XCR0_AVX)) { + if ((xcr0 & (XCR0_SSE | XCR0_AVX)) == (XCR0_SSE | XCR0_AVX)) + { cpu_features->has_avx = 1; } } @@ -170,7 +179,8 @@ _sodium_runtime_intel_cpu_features(CPUFeatures * const cpu_features) cpu_features->has_avx2 = 0; #if defined(HAVE_AVX2INTRIN_H) || \ - (defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) + (defined(_MSC_VER) && \ + (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) if (cpu_features->has_avx) { unsigned int cpu_info7[4]; @@ -179,13 +189,14 @@ _sodium_runtime_intel_cpu_features(CPUFeatures * const cpu_features) } #endif -#if defined(HAVE_WMMINTRIN_H) || \ - (defined(_MSC_VER) && _MSC_VER >= 1600 && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) +#if defined(HAVE_WMMINTRIN_H) || \ + (defined(_MSC_VER) && _MSC_VER >= 1600 && \ + (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))) cpu_features->has_pclmul = ((cpu_info[2] & CPUID_ECX_PCLMUL) != 0x0); - cpu_features->has_aesni = ((cpu_info[2] & CPUID_ECX_AESNI) != 0x0); + cpu_features->has_aesni = ((cpu_info[2] & CPUID_ECX_AESNI) != 0x0); #else cpu_features->has_pclmul = 0; - cpu_features->has_aesni = 0; + cpu_features->has_aesni = 0; #endif return 0; @@ -204,46 +215,55 @@ _sodium_runtime_get_cpu_features(void) } int -sodium_runtime_has_neon(void) { +sodium_runtime_has_neon(void) +{ return _cpu_features.has_neon; } int -sodium_runtime_has_sse2(void) { +sodium_runtime_has_sse2(void) +{ return _cpu_features.has_sse2; } int -sodium_runtime_has_sse3(void) { +sodium_runtime_has_sse3(void) +{ return _cpu_features.has_sse3; } int -sodium_runtime_has_ssse3(void) { +sodium_runtime_has_ssse3(void) +{ return _cpu_features.has_ssse3; } int -sodium_runtime_has_sse41(void) { +sodium_runtime_has_sse41(void) +{ return _cpu_features.has_sse41; } int -sodium_runtime_has_avx(void) { +sodium_runtime_has_avx(void) +{ return _cpu_features.has_avx; } int -sodium_runtime_has_avx2(void) { +sodium_runtime_has_avx2(void) +{ return _cpu_features.has_avx2; } int -sodium_runtime_has_pclmul(void) { +sodium_runtime_has_pclmul(void) +{ return _cpu_features.has_pclmul; } int -sodium_runtime_has_aesni(void) { +sodium_runtime_has_aesni(void) +{ return _cpu_features.has_aesni; }